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DTS include tree

msm8610-ara.dts
/include/ "msm8610-v2.dtsi"
          /include/ "msm8610.dtsi"
                    /include/ "skeleton.dtsi"
                    /include/ "msm8610-camera.dtsi"
                    /include/ "msm-iommu-v0.dtsi"
                    /include/ "msm8610-ion.dtsi"
                    /include/ "msm8610-gpu.dtsi"
                    /include/ "msm-gdsc.dtsi"
                    /include/ "msm8610-coresight.dtsi"
                    /include/ "msm8610-smp2p.dtsi"
                    /include/ "msm8610-bus.dtsi"
                    /include/ "msm8610-mdss.dtsi"
                              /include/ "msm8610-mdss-panels.dtsi"
                                        /include/ "dsi-panel-chimei-wvga-cmd.dtsi"
                    /include/ "msm-rdbg.dtsi"
                    /include/ "msm8610-iommu-domains.dtsi"
                    /include/ "msm-pm8110-rpm-regulator.dtsi"
                    /include/ "msm-pm8110.dtsi"
                    /include/ "msm8610-regulator.dtsi"
          /include/ "msm8610-v2-pm.dtsi"
/include/ "msm8610-ara.dtsi"
          /include/ "batterydata-BV5S-1800mAh.dtsi"
/include/ "msm8610-camera-sensor-ara.dtsi"
/include/ "c4_touch.dtsi"
/include/ "sms_dtv.dtsi"

Our dts files origins

msm8610-ara.dtsi <- msm8610-mtp.dtsi
dsi-panel-chimei-wvga-cmd.dtsi <- dsi-panel-truly-wvga-cmd.dtsi

Voltage and clock stuff

arch/arm/boot/dts/msm8610.dtsi
...
qcom,speed0-bin-v0 =
                        <         0 0>,
                        < 384000000 1>,
                        < 787200000 2>,
                        <1190400000 3>;

                cpu-vdd-supply = <&apc_vreg_corner>;
        };
...
qcom,msm-cpufreq@0 {
                reg = <0 4>;
                compatible = "qcom,msm-cpufreq";
                qcom,cpufreq-table =
                        <  300000  762 >,
                        <  384000  762 >,
                        <  600000 1525 >,
                        <  787200 1525 >,
                        <  998400 2540 >,
                        < 1190400 2540 >;
        };
...

How to add new speed bin

Example patch from caf https://www.codeaurora.org/cgit/quic/la/kernel/msm/commit/arch/arm/boot/dts?h=LA.BF.1.1.2.c1-00400-8x10.0&id=85f997856d4bb7a9a23d3461f10c5f6c8c4b6414

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