Unknown user в 08:14, 15 октября 2014

2014-10-15T08:14:11Z

Новая страница

==Документация==
[http://www.spinics.net/lists/linux-tegra/msg08125.html Tegra application notes, (and tegrarcm & cbootimage)]

==Исходники==
https://gitorious.org/cbootimage/cbootimage/trees/master

==Пример вывода bct_dump==
<pre>
Version = 0x00020001;
BlockSize = 0x00004000;
PageSize = 0x00000200;
PartitionSize = 0x01000000;
# Bootloader used = 1;
# Bootloaders max = 4;
# BCT size = 4080;
# Hash size = 16;
# Crypto offset = 16;
# Crypto length = 4064;
# Max BCT search blocks = 64;
#
# These values are set by cbootimage using the
# bootloader provided by the Bootloader=...
# configuration option.
#
# Bootloader[0].Version = 0x00000001;
# Bootloader[0].Start block = 224;
# Bootloader[0].Start page = 0;
# Bootloader[0].Length = 938708;
# Bootloader[0].Load address = 0x00108000;
# Bootloader[0].Entry point = 0x00108000;
# Bootloader[0].Attributes = 0x00000004;

DevType[0] = NvBootDevType_Sdmmc;
DeviceParam[0].SdmmcParams.ClockDivider = 0x0000000c;
DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit;
DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000;

DevType[1] = NvBootDevType_Sdmmc;
DeviceParam[1].SdmmcParams.ClockDivider = 0x0000000c;
DeviceParam[1].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit;
DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x00000000;

DevType[2] = NvBootDevType_Sdmmc;
DeviceParam[2].SdmmcParams.ClockDivider = 0x0000000c;
DeviceParam[2].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit;
DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x00000000;

DevType[3] = NvBootDevType_Sdmmc;
DeviceParam[3].SdmmcParams.ClockDivider = 0x0000000c;
DeviceParam[3].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit;
DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x00000000;

SDRAM[0].MemoryType = NvBootMemoryType_Ddr2;
SDRAM[0].PllMChargePumpSetupControl = 0x00000008;
SDRAM[0].PllMLoopFilterSetupControl = 0x00000000;
SDRAM[0].PllMInputDivider = 0x0000000c;
SDRAM[0].PllMFeedbackDivider = 0x0000029a;
SDRAM[0].PllMPostDivider = 0x00000000;
SDRAM[0].PllMStableTime = 0x0000012c;
SDRAM[0].EmcClockDivider = 0x00000001;
SDRAM[0].EmcAutoCalInterval = 0x00000000;
SDRAM[0].EmcAutoCalConfig = 0xe0a61111;
SDRAM[0].EmcAutoCalWait = 0x00000000;
SDRAM[0].EmcPinProgramWait = 0x00000000;
SDRAM[0].EmcRc = 0x00000014;
SDRAM[0].EmcRfc = 0x0000002b;
SDRAM[0].EmcRas = 0x0000000f;
SDRAM[0].EmcRp = 0x00000005;
SDRAM[0].EmcR2w = 0x00000004;
SDRAM[0].EmcW2r = 0x00000005;
SDRAM[0].EmcR2p = 0x00000003;
SDRAM[0].EmcW2p = 0x0000000c;
SDRAM[0].EmcRrd = 0x00000003;
SDRAM[0].EmcRdRcd = 0x00000005;
SDRAM[0].EmcWrRcd = 0x00000005;
SDRAM[0].EmcRext = 0x00000001;
SDRAM[0].EmcWdv = 0x00000004;
SDRAM[0].EmcQUseExtra = 0x00000000;
SDRAM[0].EmcQUse = 0x00000005;
SDRAM[0].EmcQRst = 0x00000004;
SDRAM[0].EmcQSafe = 0x00000009;
SDRAM[0].EmcRdv = 0x0000000d;
SDRAM[0].EmcRefresh = 0x000009ff;
SDRAM[0].EmcBurstRefreshNum = 0x00000000;
SDRAM[0].EmcPdEx2Wr = 0x00000003;
SDRAM[0].EmcPdEx2Rd = 0x00000003;
SDRAM[0].EmcPChg2Pden = 0x00000005;
SDRAM[0].EmcAct2Pden = 0x00000005;
SDRAM[0].EmcAr2Pden = 0x00000001;
SDRAM[0].EmcRw2Pden = 0x0000000f;
SDRAM[0].EmcTxsr = 0x000000c8;
SDRAM[0].EmcTcke = 0x00000003;
SDRAM[0].EmcTfaw = 0x0000000c;
SDRAM[0].EmcTrpab = 0x00000006;
SDRAM[0].EmcTClkStable = 0x00000008;
SDRAM[0].EmcTClkStop = 0x00000002;
SDRAM[0].EmcTRefBw = 0x00000000;
SDRAM[0].EmcFbioCfg1 = 0x00000000;
SDRAM[0].EmcFbioDqsibDlyMsb = 0x00000000;
SDRAM[0].EmcFbioDqsibDly = 0x34343434;
SDRAM[0].EmcFbioQuseDlyMsb = 0x00000000;
SDRAM[0].EmcFbioQuseDly = 0x6c6c6c6c;
SDRAM[0].EmcFbioCfg5 = 0x00000083;
SDRAM[0].EmcFbioCfg6 = 0x00000002;
SDRAM[0].EmcFbioSpare = 0x00000000;
SDRAM[0].EmcMrsResetDllWait = 0x00000000;
SDRAM[0].EmcMrsResetDll = 0x00000000;
SDRAM[0].EmcMrsDdr2DllReset = 0x00000100;
SDRAM[0].EmcMrs = 0x00000a6a;
SDRAM[0].EmcEmrsEmr2 = 0x00200000;
SDRAM[0].EmcEmrsEmr3 = 0x00300000;
SDRAM[0].EmcEmrsDdr2DllEnable = 0x00100000;
SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00100382;
SDRAM[0].EmcEmrs = 0x00100002;
SDRAM[0].EmcMrw1 = 0x00000000;
SDRAM[0].EmcMrw2 = 0x00000000;
SDRAM[0].EmcMrw3 = 0x00000000;
SDRAM[0].EmcMrwResetCommand = 0x00000000;
SDRAM[0].EmcMrwResetNInitWait = 0x00000000;
SDRAM[0].EmcAdrCfg1 = 0x00070303;
SDRAM[0].EmcAdrCfg = 0x00070303;
SDRAM[0].McEmemCfg = 0x00080000;
SDRAM[0].McLowLatencyConfig = 0x80000003;
SDRAM[0].EmcCfg2 = 0x00000405;
SDRAM[0].EmcCfgDigDll = 0x00000016;
SDRAM[0].EmcCfgClktrim0 = 0x00000000;
SDRAM[0].EmcCfgClktrim1 = 0x00000000;
SDRAM[0].EmcCfgClktrim2 = 0x00000000;
SDRAM[0].EmcCfg = 0x0001ff00;
SDRAM[0].EmcDbg = 0x01000000;
SDRAM[0].AhbArbitrationXbarCtrl = 0x00010000;
SDRAM[0].EmcDllXformDqs = 0x00000010;
SDRAM[0].EmcDllXformQUse = 0x00000008;
SDRAM[0].WarmBootWait = 0x00000002;
SDRAM[0].EmcCttTermCtrl = 0x00000802;
SDRAM[0].EmcOdtWrite = 0x00000000;
SDRAM[0].EmcOdtRead = 0x00000000;
SDRAM[0].EmcZcalRefCnt = 0x00000000;
SDRAM[0].EmcZcalWaitCnt = 0x00000000;
SDRAM[0].EmcZcalMrwCmd = 0x00000000;
SDRAM[0].EmcMrwZqInitDev0 = 0x00000000;
SDRAM[0].EmcMrwZqInitDev1 = 0x00000000;
SDRAM[0].EmcMrwZqInitWait = 0x00000000;
SDRAM[0].EmcDdr2Wait = 0x00000002;
SDRAM[0].PmcDdrPwr = 0x00000001;
SDRAM[0].ApbMiscGpXm2CfgAPadCtrl = 0x77ffc000;
SDRAM[0].ApbMiscGpXm2CfgCPadCtrl2 = 0x08080079;
SDRAM[0].ApbMiscGpXm2CfgCPadCtrl = 0x77fffff0;
SDRAM[0].ApbMiscGpXm2CfgDPadCtrl2 = 0x44440009;
SDRAM[0].ApbMiscGpXm2CfgDPadCtrl = 0x77fffff0;
SDRAM[0].ApbMiscGpXm2ClkCfgPadCtrl = 0x77ffc000;
SDRAM[0].ApbMiscGpXm2CompPadCtrl = 0x01f1f008;
SDRAM[0].ApbMiscGpXm2VttGenPadCtrl = 0x07076600;

SDRAM[1].MemoryType = NvBootMemoryType_Ddr2;
SDRAM[1].PllMChargePumpSetupControl = 0x00000008;
SDRAM[1].PllMLoopFilterSetupControl = 0x00000000;
SDRAM[1].PllMInputDivider = 0x0000000c;
SDRAM[1].PllMFeedbackDivider = 0x0000029a;
SDRAM[1].PllMPostDivider = 0x00000000;
SDRAM[1].PllMStableTime = 0x0000012c;
SDRAM[1].EmcClockDivider = 0x00000001;
SDRAM[1].EmcAutoCalInterval = 0x00000000;
SDRAM[1].EmcAutoCalConfig = 0xe0a61111;
SDRAM[1].EmcAutoCalWait = 0x00000000;
SDRAM[1].EmcPinProgramWait = 0x00000000;
SDRAM[1].EmcRc = 0x00000014;
SDRAM[1].EmcRfc = 0x0000002b;
SDRAM[1].EmcRas = 0x0000000f;
SDRAM[1].EmcRp = 0x00000005;
SDRAM[1].EmcR2w = 0x00000004;
SDRAM[1].EmcW2r = 0x00000005;
SDRAM[1].EmcR2p = 0x00000003;
SDRAM[1].EmcW2p = 0x0000000c;
SDRAM[1].EmcRrd = 0x00000003;
SDRAM[1].EmcRdRcd = 0x00000005;
SDRAM[1].EmcWrRcd = 0x00000005;
SDRAM[1].EmcRext = 0x00000001;
SDRAM[1].EmcWdv = 0x00000004;
SDRAM[1].EmcQUseExtra = 0x00000000;
SDRAM[1].EmcQUse = 0x00000005;
SDRAM[1].EmcQRst = 0x00000004;
SDRAM[1].EmcQSafe = 0x00000009;
SDRAM[1].EmcRdv = 0x0000000d;
SDRAM[1].EmcRefresh = 0x000009ff;
SDRAM[1].EmcBurstRefreshNum = 0x00000000;
SDRAM[1].EmcPdEx2Wr = 0x00000003;
SDRAM[1].EmcPdEx2Rd = 0x00000003;
SDRAM[1].EmcPChg2Pden = 0x00000005;
SDRAM[1].EmcAct2Pden = 0x00000005;
SDRAM[1].EmcAr2Pden = 0x00000001;
SDRAM[1].EmcRw2Pden = 0x0000000f;
SDRAM[1].EmcTxsr = 0x000000c8;
SDRAM[1].EmcTcke = 0x00000003;
SDRAM[1].EmcTfaw = 0x0000000c;
SDRAM[1].EmcTrpab = 0x00000006;
SDRAM[1].EmcTClkStable = 0x00000008;
SDRAM[1].EmcTClkStop = 0x00000002;
SDRAM[1].EmcTRefBw = 0x00000000;
SDRAM[1].EmcFbioCfg1 = 0x00000000;
SDRAM[1].EmcFbioDqsibDlyMsb = 0x00000000;
SDRAM[1].EmcFbioDqsibDly = 0x34343434;
SDRAM[1].EmcFbioQuseDlyMsb = 0x00000000;
SDRAM[1].EmcFbioQuseDly = 0x6c6c6c6c;
SDRAM[1].EmcFbioCfg5 = 0x00000083;
SDRAM[1].EmcFbioCfg6 = 0x00000002;
SDRAM[1].EmcFbioSpare = 0x00000000;
SDRAM[1].EmcMrsResetDllWait = 0x00000000;
SDRAM[1].EmcMrsResetDll = 0x00000000;
SDRAM[1].EmcMrsDdr2DllReset = 0x00000100;
SDRAM[1].EmcMrs = 0x00000a6a;
SDRAM[1].EmcEmrsEmr2 = 0x00200000;
SDRAM[1].EmcEmrsEmr3 = 0x00300000;
SDRAM[1].EmcEmrsDdr2DllEnable = 0x00100000;
SDRAM[1].EmcEmrsDdr2OcdCalib = 0x00100382;
SDRAM[1].EmcEmrs = 0x00100002;
SDRAM[1].EmcMrw1 = 0x00000000;
SDRAM[1].EmcMrw2 = 0x00000000;
SDRAM[1].EmcMrw3 = 0x00000000;
SDRAM[1].EmcMrwResetCommand = 0x00000000;
SDRAM[1].EmcMrwResetNInitWait = 0x00000000;
SDRAM[1].EmcAdrCfg1 = 0x00070303;
SDRAM[1].EmcAdrCfg = 0x00070303;
SDRAM[1].McEmemCfg = 0x00080000;
SDRAM[1].McLowLatencyConfig = 0x80000003;
SDRAM[1].EmcCfg2 = 0x00000405;
SDRAM[1].EmcCfgDigDll = 0x00000016;
SDRAM[1].EmcCfgClktrim0 = 0x00000000;
SDRAM[1].EmcCfgClktrim1 = 0x00000000;
SDRAM[1].EmcCfgClktrim2 = 0x00000000;
SDRAM[1].EmcCfg = 0x0001ff00;
SDRAM[1].EmcDbg = 0x01000000;
SDRAM[1].AhbArbitrationXbarCtrl = 0x00010000;
SDRAM[1].EmcDllXformDqs = 0x00000010;
SDRAM[1].EmcDllXformQUse = 0x00000008;
SDRAM[1].WarmBootWait = 0x00000002;
SDRAM[1].EmcCttTermCtrl = 0x00000802;
SDRAM[1].EmcOdtWrite = 0x00000000;
SDRAM[1].EmcOdtRead = 0x00000000;
SDRAM[1].EmcZcalRefCnt = 0x00000000;
SDRAM[1].EmcZcalWaitCnt = 0x00000000;
SDRAM[1].EmcZcalMrwCmd = 0x00000000;
SDRAM[1].EmcMrwZqInitDev0 = 0x00000000;
SDRAM[1].EmcMrwZqInitDev1 = 0x00000000;
SDRAM[1].EmcMrwZqInitWait = 0x00000000;
SDRAM[1].EmcDdr2Wait = 0x00000002;
SDRAM[1].PmcDdrPwr = 0x00000001;
SDRAM[1].ApbMiscGpXm2CfgAPadCtrl = 0x77ffc000;
SDRAM[1].ApbMiscGpXm2CfgCPadCtrl2 = 0x08080079;
SDRAM[1].ApbMiscGpXm2CfgCPadCtrl = 0x77fffff0;
SDRAM[1].ApbMiscGpXm2CfgDPadCtrl2 = 0x44440009;
SDRAM[1].ApbMiscGpXm2CfgDPadCtrl = 0x77fffff0;
SDRAM[1].ApbMiscGpXm2ClkCfgPadCtrl = 0x77ffc000;
SDRAM[1].ApbMiscGpXm2CompPadCtrl = 0x01f1f008;
SDRAM[1].ApbMiscGpXm2VttGenPadCtrl = 0x07076600;

SDRAM[2].MemoryType = NvBootMemoryType_Ddr2;
SDRAM[2].PllMChargePumpSetupControl = 0x00000008;
SDRAM[2].PllMLoopFilterSetupControl = 0x00000000;
SDRAM[2].PllMInputDivider = 0x0000000c;
SDRAM[2].PllMFeedbackDivider = 0x0000029a;
SDRAM[2].PllMPostDivider = 0x00000000;
SDRAM[2].PllMStableTime = 0x0000012c;
SDRAM[2].EmcClockDivider = 0x00000001;
SDRAM[2].EmcAutoCalInterval = 0x00000000;
SDRAM[2].EmcAutoCalConfig = 0xe0a61111;
SDRAM[2].EmcAutoCalWait = 0x00000000;
SDRAM[2].EmcPinProgramWait = 0x00000000;
SDRAM[2].EmcRc = 0x00000014;
SDRAM[2].EmcRfc = 0x0000002b;
SDRAM[2].EmcRas = 0x0000000f;
SDRAM[2].EmcRp = 0x00000005;
SDRAM[2].EmcR2w = 0x00000004;
SDRAM[2].EmcW2r = 0x00000005;
SDRAM[2].EmcR2p = 0x00000003;
SDRAM[2].EmcW2p = 0x0000000c;
SDRAM[2].EmcRrd = 0x00000003;
SDRAM[2].EmcRdRcd = 0x00000005;
SDRAM[2].EmcWrRcd = 0x00000005;
SDRAM[2].EmcRext = 0x00000001;
SDRAM[2].EmcWdv = 0x00000004;
SDRAM[2].EmcQUseExtra = 0x00000000;
SDRAM[2].EmcQUse = 0x00000005;
SDRAM[2].EmcQRst = 0x00000004;
SDRAM[2].EmcQSafe = 0x00000009;
SDRAM[2].EmcRdv = 0x0000000d;
SDRAM[2].EmcRefresh = 0x000009ff;
SDRAM[2].EmcBurstRefreshNum = 0x00000000;
SDRAM[2].EmcPdEx2Wr = 0x00000003;
SDRAM[2].EmcPdEx2Rd = 0x00000003;
SDRAM[2].EmcPChg2Pden = 0x00000005;
SDRAM[2].EmcAct2Pden = 0x00000005;
SDRAM[2].EmcAr2Pden = 0x00000001;
SDRAM[2].EmcRw2Pden = 0x0000000f;
SDRAM[2].EmcTxsr = 0x000000c8;
SDRAM[2].EmcTcke = 0x00000003;
SDRAM[2].EmcTfaw = 0x0000000c;
SDRAM[2].EmcTrpab = 0x00000006;
SDRAM[2].EmcTClkStable = 0x00000008;
SDRAM[2].EmcTClkStop = 0x00000002;
SDRAM[2].EmcTRefBw = 0x00000000;
SDRAM[2].EmcFbioCfg1 = 0x00000000;
SDRAM[2].EmcFbioDqsibDlyMsb = 0x00000000;
SDRAM[2].EmcFbioDqsibDly = 0x34343434;
SDRAM[2].EmcFbioQuseDlyMsb = 0x00000000;
SDRAM[2].EmcFbioQuseDly = 0x6c6c6c6c;
SDRAM[2].EmcFbioCfg5 = 0x00000083;
SDRAM[2].EmcFbioCfg6 = 0x00000002;
SDRAM[2].EmcFbioSpare = 0x00000000;
SDRAM[2].EmcMrsResetDllWait = 0x00000000;
SDRAM[2].EmcMrsResetDll = 0x00000000;
SDRAM[2].EmcMrsDdr2DllReset = 0x00000100;
SDRAM[2].EmcMrs = 0x00000a6a;
SDRAM[2].EmcEmrsEmr2 = 0x00200000;
SDRAM[2].EmcEmrsEmr3 = 0x00300000;
SDRAM[2].EmcEmrsDdr2DllEnable = 0x00100000;
SDRAM[2].EmcEmrsDdr2OcdCalib = 0x00100382;
SDRAM[2].EmcEmrs = 0x00100002;
SDRAM[2].EmcMrw1 = 0x00000000;
SDRAM[2].EmcMrw2 = 0x00000000;
SDRAM[2].EmcMrw3 = 0x00000000;
SDRAM[2].EmcMrwResetCommand = 0x00000000;
SDRAM[2].EmcMrwResetNInitWait = 0x00000000;
SDRAM[2].EmcAdrCfg1 = 0x00070303;
SDRAM[2].EmcAdrCfg = 0x00070303;
SDRAM[2].McEmemCfg = 0x00080000;
SDRAM[2].McLowLatencyConfig = 0x80000003;
SDRAM[2].EmcCfg2 = 0x00000405;
SDRAM[2].EmcCfgDigDll = 0x00000016;
SDRAM[2].EmcCfgClktrim0 = 0x00000000;
SDRAM[2].EmcCfgClktrim1 = 0x00000000;
SDRAM[2].EmcCfgClktrim2 = 0x00000000;
SDRAM[2].EmcCfg = 0x0001ff00;
SDRAM[2].EmcDbg = 0x01000000;
SDRAM[2].AhbArbitrationXbarCtrl = 0x00010000;
SDRAM[2].EmcDllXformDqs = 0x00000010;
SDRAM[2].EmcDllXformQUse = 0x00000008;
SDRAM[2].WarmBootWait = 0x00000002;
SDRAM[2].EmcCttTermCtrl = 0x00000802;
SDRAM[2].EmcOdtWrite = 0x00000000;
SDRAM[2].EmcOdtRead = 0x00000000;
SDRAM[2].EmcZcalRefCnt = 0x00000000;
SDRAM[2].EmcZcalWaitCnt = 0x00000000;
SDRAM[2].EmcZcalMrwCmd = 0x00000000;
SDRAM[2].EmcMrwZqInitDev0 = 0x00000000;
SDRAM[2].EmcMrwZqInitDev1 = 0x00000000;
SDRAM[2].EmcMrwZqInitWait = 0x00000000;
SDRAM[2].EmcDdr2Wait = 0x00000002;
SDRAM[2].PmcDdrPwr = 0x00000001;
SDRAM[2].ApbMiscGpXm2CfgAPadCtrl = 0x77ffc000;
SDRAM[2].ApbMiscGpXm2CfgCPadCtrl2 = 0x08080079;
SDRAM[2].ApbMiscGpXm2CfgCPadCtrl = 0x77fffff0;
SDRAM[2].ApbMiscGpXm2CfgDPadCtrl2 = 0x44440009;
SDRAM[2].ApbMiscGpXm2CfgDPadCtrl = 0x77fffff0;
SDRAM[2].ApbMiscGpXm2ClkCfgPadCtrl = 0x77ffc000;
SDRAM[2].ApbMiscGpXm2CompPadCtrl = 0x01f1f008;
SDRAM[2].ApbMiscGpXm2VttGenPadCtrl = 0x07076600;
</pre>

Cbootimg - История изменений

Unknown user в 08:14, 15 октября 2014