4.1-rc1+ lcd fail to start: различия между версиями

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м (→‎Kernel 4.5-rc+: break lines)
м (add one more discussion)
 
(не показана 1 промежуточная версия этого же участника)
Строка 33: Строка 33:
[    8.079160] [drm] Initialized tegra 0.0.0 20120330 on minor 0
[    8.079160] [drm] Initialized tegra 0.0.0 20120330 on minor 0
[    8.084942] initcall deferred_probe_initcall+0x0/0x88 returned 0 after 126122 usecs
[    8.084942] initcall deferred_probe_initcall+0x0/0x88 returned 0 after 126122 usecs
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<tagr_> zombah: I suspect power sequencing
<tagr_> zombah: you might want to try with adding some post-ramp-delays to various regulators, perhaps the panel needs some time to start up, or the regulators need time to reach the voltage
<tagr_> zombah: you could possibly achieve the same effect by adding msleep() at various points in the panel driver
<tagr_> zombah: such as at the beginning of ->prepare() and ->enable()
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<tagr> the only regulator connected to the panel is vdd_pnl_reg, and that gets enabled after the msleep() that zombah added, so I don't see how adding a ramp delay would help with that
<tagr> marvin24: it looks like, from the schematic, +3VS is derived from +5valw, but that dependency isn't represented in DT, so technically this could be triggered by the +5valw and +3VS,vdd_pnl regulators being probe at almost the same time
<marvin24> there is also backlight
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Текущая версия от 09:57, 11 марта 2016

Kernel 4.5-rc+

Kernel compiled with tegra_defconfig, added dummy vbus regulators to usb-phy.

Panel starts fine: http://pastebin.com/en7pauJU
Panel failed to start: http://pastebin.com/5FjsBizU

DRM defered probe initcall compare:

fine:
[    6.803695] calling  deferred_probe_initcall+0x0/0x88 @ 1
[    6.814731] tegra-dc 54200000.dc: failed to probe RGB output: -517
[    6.820254] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[    6.820256] [drm] No driver support for vblank timestamp query.
[    7.396049]  mmcblk0: p1
[    7.406688] mmc1: new high speed MMC card at address 0001
[    7.407711] mmcblk1: mmc1:0001 SEM08G 7.40 GiB
[    7.408165] mmcblk1boot0: mmc1:0001 SEM08G partition 1 1.00 MiB
[    7.408615] mmcblk1boot1: mmc1:0001 SEM08G partition 2 1.00 MiB
[    7.416898]  mmcblk1: p1 p2 p3 p4 p5 p6 p7 p8
[    7.444594] Console: switching to colour frame buffer device 128x37
[    7.485416] drm drm: fb0:  frame buffer device
[    7.519146] [drm] Initialized tegra 0.0.0 20120330 on minor 0
[    7.524930] initcall deferred_probe_initcall+0x0/0x88 returned 0 after 704314 usecs

failed:
[    7.950095] calling  deferred_probe_initcall+0x0/0x88 @ 1
[    7.957206] tegra-dc 54200000.dc: failed to probe RGB output: -517
[    7.969720] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[    7.976622] [drm] No driver support for vblank timestamp query.
[    7.997470] input: ImPS/2 Generic Wheel Mouse as /devices/serio0/input/input4
[    8.034635] Console: switching to colour frame buffer device 128x37
[    8.054130] drm drm: fb0:  frame buffer device
[    8.079160] [drm] Initialized tegra 0.0.0 20120330 on minor 0
[    8.084942] initcall deferred_probe_initcall+0x0/0x88 returned 0 after 126122 usecs
<tagr_> zombah: I suspect power sequencing
<tagr_> zombah: you might want to try with adding some post-ramp-delays to various regulators, perhaps the panel needs some time to start up, or the regulators need time to reach the voltage
<tagr_> zombah: you could possibly achieve the same effect by adding msleep() at various points in the panel driver
<tagr_> zombah: such as at the beginning of ->prepare() and ->enable()
<tagr> the only regulator connected to the panel is vdd_pnl_reg, and that gets enabled after the msleep() that zombah added, so I don't see how adding a ramp delay would help with that
<tagr> marvin24: it looks like, from the schematic, +3VS is derived from +5valw, but that dependency isn't represented in DT, so technically this could be triggered by the +5valw and +3VS,vdd_pnl regulators being probe at almost the same time
<marvin24> there is also backlight